Author Topic: Question on CAN bus architecture example in SysML specification  (Read 358 times)

mse

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Question on CAN bus architecture example in SysML specification
« on: September 05, 2019, 07:25:38 pm »
In the CAN bus architecture example in the SysML spec v1.5 https://www.omg.org/spec/SysML/1.5/PDF, they show some blocks interconnected via a CAN bus. The example makes sense but there was one small detail that I did not quite understand. Noticed on Figure D.39 - Flow Allocation to Power Subsystem (Internal Block Diagram), that there are no ports on the can:CAN_Bus, instead, the conjugated port is on the destination block on the other side of the can:CAN_Bus. Why was this done? What if they had inserted a port on the CAN_Bus does that change things somehow semantically?

PeterHeintz

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Re: Question on CAN bus architecture example in SysML specification
« Reply #1 on: September 05, 2019, 08:05:57 pm »
In general this example diagram looks a bit strange to me, because the IDB seem to have blocks rather than parts.

Ignoring that fact, SysML allow connecting parts without ports. Not using ports to connect part1 with part 2 means part1 is connected somehow to part2 but I do not tell you how or I do not know how.

If the two parts are connect with ports having classifiers, it means part1 is connected with part1 port and the details are defined in the part1 port classifier to part2 with the part2 port and the details are defined in the part2 port classifier.

If they had added the counterpart ports to the CAN_Bus as well, it would make clear that there is a one to one relationship between ports.

Without those ports, you are allowed to implement that one to one relationship, or you are allowed to implement a one to one relationship ports within a super port, or you are allowed to implement a super port which can handle all ports connected to CAN_Bus in common.

In other words, yes there is a semantical difference.
Best regards,

Peter Heintz